ÖZKILBAÇ, B. And KARACALI, T. 2024. Design of a novel low-latency parameterizable posit adder/subtractor using leading one predictor in FPGA. Digital Signal Processing: A Review Journal , vol.155 .

ÖZKILBAÇ, B., & KARACALI, T., (2024). Design of a novel low-latency parameterizable posit adder/subtractor using leading one predictor in FPGA. Digital Signal Processing: A Review Journal , vol.155.

ÖZKILBAÇ, Bahadır, And Tevhit KARACALI. "Design of a novel low-latency parameterizable posit adder/subtractor using leading one predictor in FPGA," Digital Signal Processing: A Review Journal , vol.155, 2024

ÖZKILBAÇ, Bahadır And KARACALI, Tevhit. "Design of a novel low-latency parameterizable posit adder/subtractor using leading one predictor in FPGA." Digital Signal Processing: A Review Journal , vol.155, 2024

ÖZKILBAÇ, B. And KARACALI, T. (2024) . "Design of a novel low-latency parameterizable posit adder/subtractor using leading one predictor in FPGA." Digital Signal Processing: A Review Journal , vol.155.

@article{article, author={Bahadır ÖZKILBAÇ And author={Tevhit KARACALI}, title={Design of a novel low-latency parameterizable posit adder/subtractor using leading one predictor in FPGA}, journal={Digital Signal Processing: A Review Journal}, year=2024}