Temperature dependent current-voltage characteristics of the Zn/ZnO/n-Si/Au-Sb structure with ZnO interface layer grown on n-Si substrate by SILAR method


YILDIRIM M. A., Guzeldir B., Ates A., Saglam M.

MICROELECTRONIC ENGINEERING, cilt.88, sa.10, ss.3075-3079, 2011 (SCI-Expanded) identifier identifier

  • Yayın Türü: Makale / Tam Makale
  • Cilt numarası: 88 Sayı: 10
  • Basım Tarihi: 2011
  • Doi Numarası: 10.1016/j.mee.2011.05.025
  • Dergi Adı: MICROELECTRONIC ENGINEERING
  • Derginin Tarandığı İndeksler: Science Citation Index Expanded (SCI-EXPANDED), Scopus
  • Sayfa Sayıları: ss.3075-3079
  • Anahtar Kelimeler: ZnO, SILAR, Sandwich structure, Interface layer, Barrier inhomogeneity, THIN-FILMS, ELECTRICAL-PROPERTIES, SCHOTTKY DIODES, DEPOSITION, SENSOR
  • Atatürk Üniversitesi Adresli: Evet

Özet

This is the first time; it was employed Successive Ionic Layer Adsorption and Reaction (SILAR) method in order to prepare Zn/ZnO/n-Si/Au-Sb sandwich structure. The ZnO interface layer was directly formed on n-type Si substrate using SILAR method. The X-ray diffraction (XRD) and scanning electron microscopy (SEM) studies were showed that the film is covered well on n-type Si substrate and have polycrystalline structure. An Au-Sb electrode was used as an ohmic contact. The Zn/ZnO/n-Si/Au-Sb sandwich structure demonstrated clearly rectifying behavior by the current-voltage (I-V) curves studied at room temperature. The sample temperature effect on the current-voltage (I-V) characteristics of Zn/ZnO/n-Si/Au-Sb structure was investigated in temperature range 80-320 K by steps of 20 K. The parameters such as barrier height, ideality factor and series resistance of this structure were calculated from the forward bias I-V characteristics as a function of sample temperature. It was seen that the ideality factor and series resistance were decreased; the barrier height were increased with increasing temperature. The experimental values of barrier height and ideality factor for this device were calculated as 0.808 eV and 1.519 at 320 K; 0.220 eV and 4.961 at 80 K, respectively. These abnormal behaviors can be explained by the barrier inhomogeneities at the metal-semiconductor (M-S) interface. (C) 2011 Elsevier B.V. All rights reserved.