Akademik Veri Yönetim Sistemi
7th International Symposium on Quality Electronic Design, San-Jose, Kostarika, 27 - 29 Mart 2006, ss.165-166
With the migration to Deep Sub-Micron (DSM) process technologies, the static power (leakage) has become the major contributor to the design's overall power consumption. In this work, we will show experiments that illustrate the significant increase in the ratio of the leakage to the total power as the DSM process nodes shrink. We will also present a novel high-level design/synthesis method, called Power Islands, that minimizes the leakage in the circuit by partitioning it into islands. Each island is a cluster of logic whose power can be controlled independent from the rest of the circuit, and hence can be completely powered down when all the logic contained within it is idling. The partitioning is done in such a way that the components with maximally overlapping lifetimes are placed on the same island. A main benefit of Power Islands is the elimination of leakage in inactive components during the power down cycles of the islands, and hence a decrease in circuit's power consumption.